Monday, April 02, 2007

Intel's next microarchitecture "Nehalem"

Coming in 2008 is Intel's next brand new microarchitecture codenamed "Nehalem."

According to Intel, Nehalem is a truly dynamic- and design-scalable microarchitecture. It will deliver both performance on demand and optimal price/performance/energy efficiency for each platform.

Nehalem's dynamic scalability includes:
  • Dynamically managed cores, threads, cache, interfaces, and power
  • Leveraging leading 4 instruction issue Intel Core microarchitecture technology (Intel Core microarchitecture's ability to process up to 4 instructions per clock cycle on a sustained basis as compared to 3 instructions per clock cycle or less for other processors)
  • Simultaneous multi-threading (Intel Hyper-Threading Technology) to enhance performance and energy efficiency
  • Innovative new Intel® SSE4 and ATA instruction set architecture additions
  • Superior multi-level shared cache that leverages Intel® Smart Cache technology
  • Leadership system and memory bandwidth
  • Performance-enhanced dynamic power management

Nehalem's design scalability will enable optimal price/performance/energy efficiency for each market segment through:

  • New system architecture for next generation Intel processors and platforms
  • Scalable performance for from one-to-sixteen (or more) threads and from one-to-eight (or more) cores
  • Scalable and configurable system interconnects and integrated memory controllers
  • High performance integrated graphics engine for client platforms

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